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Freescale Semiconductor /MKE04Z1284 /NVIC /NVIC_ISER

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Interpret as NVIC_ISER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SETENA0 0 (0)SETENA1 0 (0)SETENA2 0 (0)SETENA3 0 (0)SETENA4 0 (0)SETENA5 0 (0)SETENA6 0 (0)SETENA7 0 (0)SETENA8 0 (0)SETENA9 0 (0)SETENA10 0 (0)SETENA11 0 (0)SETENA12 0 (0)SETENA13 0 (0)SETENA14 0 (0)SETENA15 0 (0)SETENA16 0 (0)SETENA17 0 (0)SETENA18 0 (0)SETENA19 0 (0)SETENA20 0 (0)SETENA21 0 (0)SETENA22 0 (0)SETENA23 0 (0)SETENA24 0 (0)SETENA25 0 (0)SETENA26 0 (0)SETENA27 0 (0)SETENA28 0 (0)SETENA29 0 (0)SETENA30 0 (0)SETENA31

SETENA26=0, SETENA7=0, SETENA29=0, SETENA20=0, SETENA13=0, SETENA12=0, SETENA23=0, SETENA11=0, SETENA27=0, SETENA31=0, SETENA14=0, SETENA17=0, SETENA10=0, SETENA4=0, SETENA2=0, SETENA25=0, SETENA30=0, SETENA9=0, SETENA15=0, SETENA19=0, SETENA16=0, SETENA21=0, SETENA28=0, SETENA18=0, SETENA5=0, SETENA22=0, SETENA6=0, SETENA8=0, SETENA1=0, SETENA24=0, SETENA3=0, SETENA0=0

Description

Interrupt Set Enable Register

Fields

SETENA0

no description available

0 (0): write: no effect; read: Reserved iv 16 interrupt disabled

1 (1): write: enable Reserved iv 16 interrupt; read: Reserved iv 16 interrupt enabled
SETENA1

no description available

0 (0): write: no effect; read: Reserved iv 17 interrupt disabled

1 (1): write: enable Reserved iv 17 interrupt; read: Reserved iv 17 interrupt enabled
SETENA2

no description available

0 (0): write: no effect; read: Reserved iv 18 interrupt disabled

1 (1): write: enable Reserved iv 18 interrupt; read: Reserved iv 18 interrupt enabled
SETENA3

no description available

0 (0): write: no effect; read: Reserved iv 19 interrupt disabled

1 (1): write: enable Reserved iv 19 interrupt; read: Reserved iv 19 interrupt enabled
SETENA4

no description available

0 (0): write: no effect; read: Reserved iv 20 interrupt disabled

1 (1): write: enable Reserved iv 20 interrupt; read: Reserved iv 20 interrupt enabled
SETENA5

no description available

0 (0): write: no effect; read: Command complete and read collision interrupt disabled

1 (1): write: enable Command complete and read collision interrupt; read: Command complete and read collision interrupt enabled
SETENA6

no description available

0 (0): write: no effect; read: Low-voltage detect, low-voltage warning interrupt disabled

1 (1): write: enable Low-voltage detect, low-voltage warning interrupt; read: Low-voltage detect, low-voltage warning interrupt enabled
SETENA7

no description available

0 (0): write: no effect; read: External Interrupt interrupt disabled

1 (1): write: enable External Interrupt interrupt; read: External Interrupt interrupt enabled
SETENA8

no description available

0 (0): write: no effect; read: Inter-Integrated Circuit 0 interrupt disabled

1 (1): write: enable Inter-Integrated Circuit 0 interrupt; read: Inter-Integrated Circuit 0 interrupt enabled
SETENA9

no description available

0 (0): write: no effect; read: Inter-Integrated Circuit 1 interrupt disabled

1 (1): write: enable Inter-Integrated Circuit 1 interrupt; read: Inter-Integrated Circuit 1 interrupt enabled
SETENA10

no description available

0 (0): write: no effect; read: Serial Peripheral Interface 0 interrupt disabled

1 (1): write: enable Serial Peripheral Interface 0 interrupt; read: Serial Peripheral Interface 0 interrupt enabled
SETENA11

no description available

0 (0): write: no effect; read: Serial Peripheral Interface 1 interrupt disabled

1 (1): write: enable Serial Peripheral Interface 1 interrupt; read: Serial Peripheral Interface 1 interrupt enabled
SETENA12

no description available

0 (0): write: no effect; read: UART0 status and error interrupt disabled

1 (1): write: enable UART0 status and error interrupt; read: UART0 status and error interrupt enabled
SETENA13

no description available

0 (0): write: no effect; read: UART1 status and error interrupt disabled

1 (1): write: enable UART1 status and error interrupt; read: UART1 status and error interrupt enabled
SETENA14

no description available

0 (0): write: no effect; read: UART2 status and error interrupt disabled

1 (1): write: enable UART2 status and error interrupt; read: UART2 status and error interrupt enabled
SETENA15

no description available

0 (0): write: no effect; read: Analog-to-Digital Converter 0 interrupt disabled

1 (1): write: enable Analog-to-Digital Converter 0 interrupt; read: Analog-to-Digital Converter 0 interrupt enabled
SETENA16

no description available

0 (0): write: no effect; read: Analog comparator 0 interrupt interrupt disabled

1 (1): write: enable Analog comparator 0 interrupt interrupt; read: Analog comparator 0 interrupt interrupt enabled
SETENA17

no description available

0 (0): write: no effect; read: FlexTimer Module 0 interrupt disabled

1 (1): write: enable FlexTimer Module 0 interrupt; read: FlexTimer Module 0 interrupt enabled
SETENA18

no description available

0 (0): write: no effect; read: FlexTimer Module 1 interrupt disabled

1 (1): write: enable FlexTimer Module 1 interrupt; read: FlexTimer Module 1 interrupt enabled
SETENA19

no description available

0 (0): write: no effect; read: FlexTimer Module 2 interrupt disabled

1 (1): write: enable FlexTimer Module 2 interrupt; read: FlexTimer Module 2 interrupt enabled
SETENA20

no description available

0 (0): write: no effect; read: Real-time counter interrupt disabled

1 (1): write: enable Real-time counter interrupt; read: Real-time counter interrupt enabled
SETENA21

no description available

0 (0): write: no effect; read: Analog comparator 1 interrupt interrupt disabled

1 (1): write: enable Analog comparator 1 interrupt interrupt; read: Analog comparator 1 interrupt interrupt enabled
SETENA22

no description available

0 (0): write: no effect; read: Periodic timer overflow channel 0 interrupt disabled

1 (1): write: enable Periodic timer overflow channel 0 interrupt; read: Periodic timer overflow channel 0 interrupt enabled
SETENA23

no description available

0 (0): write: no effect; read: Periodic timer overflow channel 1 interrupt disabled

1 (1): write: enable Periodic timer overflow channel 1 interrupt; read: Periodic timer overflow channel 1 interrupt enabled
SETENA24

no description available

0 (0): write: no effect; read: Keyboard interrupt interrupt disabled

1 (1): write: enable Keyboard interrupt interrupt; read: Keyboard interrupt interrupt enabled
SETENA25

no description available

0 (0): write: no effect; read: Keyboard interrupt interrupt disabled

1 (1): write: enable Keyboard interrupt interrupt; read: Keyboard interrupt interrupt enabled
SETENA26

no description available

0 (0): write: no effect; read: Reserved iv 42 interrupt disabled

1 (1): write: enable Reserved iv 42 interrupt; read: Reserved iv 42 interrupt enabled
SETENA27

no description available

0 (0): write: no effect; read: Clock loss of lock interrupt disabled

1 (1): write: enable Clock loss of lock interrupt; read: Clock loss of lock interrupt enabled
SETENA28

no description available

0 (0): write: no effect; read: WDOG interrupt disabled

1 (1): write: enable WDOG interrupt; read: WDOG interrupt enabled
SETENA29

no description available

0 (0): write: no effect; read: Pulse width timer interrupt disabled

1 (1): write: enable Pulse width timer interrupt; read: Pulse width timer interrupt enabled
SETENA30

no description available

0 (0): write: no effect; read: Reserved iv 46 interrupt disabled

1 (1): write: enable Reserved iv 46 interrupt; read: Reserved iv 46 interrupt enabled
SETENA31

no description available

0 (0): write: no effect; read: Reserved iv 47 interrupt disabled

1 (1): write: enable Reserved iv 47 interrupt; read: Reserved iv 47 interrupt enabled

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data